Way of working


ItoM offers a wide variety of design services. Typical services include designing and integrating key IP blocks, System on Chip (SoC) and more analog centric Application-Specific Integrated Circuits (ASIC). Often we design products that become part of our customer portfolio. However, we also develop IP on our own initiative.

  • Requirement definition
  • Feasibility and conceptual study
  • Technology choice, portability and cost analysis
  • Size and scalability
  • Testability
  • Integrate-ability
  • Power consumption estimation
  • Processing requirements and hardware software partitioning
  • Manufacturability and yield
  • Verification plan
  • Modelling in Verilog-A, Verilog, MATLAB/Simulink , C/C++
  • Analog and mixed-signal integrated circuits are designed, implemented and verified using Cadence and Synopsys tools:
    • Simulation: Spectre, SpectreRF, APS
    • Configuration and post-processing: ADE, ADE-XL
    • Schematic entry: Cadence Virtuoso
    • DRC & LVS: Mentor Calibre or Cadence Assura
    • Extraction: Synopsys STAR-RCXT + Mentor or Cadence
  • Digital design, Verilog(or VHDL) coding, verification and implementation
    • MATLAB/Simulink co-simulation
    • Constrained random based verification
    • Cadence or Synopsys synthesis and implementation flow
  • Design for testability (DFT), scan insertion, ATPG
  • PVT (process voltage temperature) and Monte Carlo simulations
  • Integration support

Design and implementation

Cadence and MathWorks tools are used to study the effect of the architectural choices. Proprietary design tools are used for the estimation of size and power consumption. However, during this phase, extensive experience is the most important tool to be used.

Validation and Industrialization

For most of our projects we use an analog on top (AoT) flow.  Our implementations use most industry standard tool flows.

  • Validation plan
  • Automated benches (testing at room temperature)
  • Plan and support factory testing